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2-Line Color CCD Linear Sensor with a 1-Line Spacing
ILX538K
Along with the current rapid growth in the personal computer market, the color image scanner is poised for rapid growth. Although Sony has already developed a line of products for color image scanners, we have now developed a new product to support A4-size documents at a deusity of 600 DPI : the ILX538K 2-line color linear sensor with a 1-line spacing.
s s s s s s s s 2-line color linear sensor consisting of an R and B dot-sequential line and a G line Pixel line spacing of 1 line Analog memory included in the CCD block. Pixel size corresponding to a 7-m pitch Ultra-low lag Excellent linearity Built-in clamp circuit Built-in sample-and-hold circuit
2-Line Color Linear Sensor Consisting of an R and B Dot-sequential Line and a G Line
Figure 1 shows the block diagram for a 3-line sensor and figure 2 shows the block diagram of the ILX538K sensor block. In 3-line sensors, the pixel lines are usually separated by a spacing of several pixel widths. Application systems normally compensate for this by providing external memory and performing interline interpolation as synchronization processing. The ILX538K consists of 2 lines, a dotsequential R and B line and a G line and succeeds in reducing the interline spacing to just 1 line.
Analog Memory for Line Synchronization Provided in the CCD Block
The ILX538K includes one line of analog memory for each of the R/B and G sensor lines and the CCD registers. It is possible to perform line data synchronization for the 2-sensor lines using this memory. This makes external correction (line data synchronization) memory unnecessary, and can significantly simplify the peripheral circuits. Since this analog memory is provided for both the R/B and G lines, line data synchronization can be performed for scanning in either direction, thus provide a high degree of freedom in end product design.
Excellent Linearity
Table 2 lists the electro-optical characteristics of the ILX538K. Since the sensor block signal charges are fully read out, there is no lag. Also, the ILX538K provides excellent linearity from small signals through the saturation output voltage.
Built-in Clamp and Sample-and-Hold Circuits
The ILX538K includes both clamp and sample-and-hold circuits for all signal outputs. Also, the ILX538K provides two independent parallel sample-andhold circuits for the R/B dot-sequential output circuits, so that the R and B signals can be output separately to individual output pins.
Pixel Size Corresponding to a 7-m Pitch
Figure 3 shows the block diagram of the ILX538K. One of the sensor lines is an R/B dot-sequential lines and the other is the G line. This structure allows the ILX538K to achieve a minimum line spacing of 1 line (7 m), which is equal to the pixel spacing. Table 1 presents an overview of the characteristics of the ILX538K. The effective pixel size is 5x6 m (for a 7 m pitch), and the ILX538K achieves the high pixel counts of 2670 effective pixels for the R and B lines and 5340 for the G line.
V
O
I
C
E
Of the 600 DPI color linear sensors developed to date, the ILX538K best provides the three critical sensor aspects; namely a small pixel size, ease of use, and a narrow line spacing. I'm sure that this device will be well received in the color image scanner market as the indispensable key device for driving further expansion of that market. Once you have been introduced to this product, you will find it truly indispensable.
s Table 1 ILX538K Overview
R
D
D
D
D
Item Number of effective pixels
8 lines
ILX538K 2670 pixels x 2 (R/B), 5340 pixels (G) 5m x 6m 7 m 1 line (7 m) 600 DPI (A4) Single 10-V power supply 22pin Cer-DIP
Readout gates CCD analog shift register
G
Effective pixel size Pixel pitch Line spacing Resolution
D
D
D
Readout gates CCD analog shift register
B
D
8 lines
D
Power supply Package
D
D
Readout gates CCD analog shift register
s Figure 1 Block Diagram of the Sensor Block in a 3-Line Sensor s Table 2 Electro-Optical Characteristics
Item R Typical value 1.1 2 1.2 5 1.5 0.02 98 20 2 % V % % mA MHz V/(lx*s) G B Sensitivity nonuniformity
D
D
Unit
CCD analog shift register 1-line delay analog memory Readout gates
--R2670 B2670
Sensitivity
D R1 B1
D
D
Saturation output voltage
G5339
G5340
1 line
D D
D G1 G2
D
Image lag Total transfer efficiency Current consumption Maximum operating frequency
Readout gates 1-line delay analog memory CCD analog shift register
s Figure 2 Block Diagram of ILX538K Sensor Block
VDD 17
VGG 4
VGG bias circuit
o2
8
Sample-andhold circuit
Clamp circuit
VOUT-R 6
CCD analog shift register 1-line delay analog memory Readout gates
--R2670 B2670
Driver
D
12 oV2
D R1 B1
D
Sample-andhold circuit
G5339
G5340
D G1 G2
D
D
D
D
VOUT-B 5
Readout gates 1-line delay analog memory CCD analog shift register
Driver Driver
13 oROG 11 oV1
VOUT-G 18
Clamp pulse & voltage generator Driver Driver
22 21 3
Sample-andhold circuit
oS/H-G
oS/H-R
s Figure 3 ILX538K Block Diagram
oS/H-B
1 2 oCLP oRS
Clamp circuit
9 GND
20 GND
10 GND
14 o1

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